In semiconductor devices, a voltage different from the externally supplied voltage sometimes is required. One example of such a voltage is the back bias voltage which is supplied to the substrate of a MOS device for improving the reliability by reducing the influence of variations in temperature and the external voltage source. Another example is a high voltage supplied to a word line of a memory cell for preventing a voltage drop in the transistor of the memory cell during selection of the word line.
U.S. Pat. No. 4,775,959 discloses an internal back bias voltage generator, which is one type of a conventional voltage generator.
As illustrated in FIG. 2, this back bias voltage (Vbb) generator includes first Vbb generator G1 and second Vbb generator G2. First Vbb generator G1 includes first oscillating section OSC1 and rectifying section REC, and second Vbb generator G2 includes second oscillating section OSC2 and rectifying section REC. First Vbb generator G1 and second Vbb generator G2 are composed of voltage generating circuits as illustrated in FIG. 1.
The three NAND gates are series connected as illustrated, with an output connected to a first input of the succeeding NAND gate, and the output of the last NAND gate connected to the first input of the first NAND gate, so that the generated signals should circulate, thereby forming an oscillator. The output of this oscillator is supplied through buffer circuit 12 to a first electrode of pumping capacitor C1. A rectifier is connected from a second electrode of capacitor C1 to transistors 16 and 17, which serve as rectifying elements.
The second input terminals of three NAND gates NAND1, NAND2 and NAND3 are commonly connected to an oscillator enable signal. The pumping capacitor of second Vbb generator G2 has a large capacitance, while the capacitor of first Vbb generator G1 has a relatively small capacitance.
As to the voltage generating operation of this circuit, when the power source Vcc is supplied, and when oscillator enable signal EN for activating oscillator OSC is input into the second input terminal of NAND gates, an oscillating output is generated.
If the oscillating output signal has a high level, the signal passes through buffer circuit 12 (driving the pumping capacitor) so as to make first electrode 14 of pumping capacitor C1 high. Under this condition, second electrode 15 of pumping capacitor C1 rises to a high level due to the coupling action of the capacitor.
If the potential of second electrode 15 of the pumping capacitor is higher than the positive terminal (ground potential GND), then first rectifying device 16 is turned on, so as to be connected with the positive terminal.
If the oscillation output signal is shifted to a low level, the low voltage is transmitted through buffer circuit 12 for driving first electrode 14 of the pumping capacitor so as to make it low. At the same time, the second electrode of the pumping capacitor also is shifted to a low level due to the coupling effect.
The potential of second electrode 15 of the pumping capacitor becomes lower than the positive terminal, so that first rectifying device 16 is turned off. If the potential of second electrode 15 of pumping capacitor 15 becomes lower than the negative terminal (e.g., back bias potential -Vbb), then second rectifying device 17 is turned on, so as to be connected to the potential of the negative terminal.
The oscillation output signal becomes high again, and this operation is repeated, with the result that electrons of the positive terminal are moved toward the negative terminal, thereby carrying out a pumping operation, and generating a voltage.
First Vbb generator G1 thus generates negative voltage, but the negative voltage is weak to a degree that it should be able to compensate only leakage of the transistors when the chip is not operating, such as during a standby state. On the other hand, the generation of the negative voltage by second Vbb generator G2 is much larger to such a degree that it should be able to compensate leakage of the transistors during normal operation of the semiconductor device.
If the voltage generation capability is to be increased, the capacity of the buffer circuit which drives the pumping capacitor has to be increased, and, at the same time, the capacitance of the pumping capacitor and the capacity of the rectifying device have to be increased.
Further, when power is supplied initially to the chip, in order to step up the back bias voltage to the desired level, a boost pump sometimes is used. This is for detecting the initial power supply by means of a power-up detector, so that the oscillating frequency should be increased, and the pumping operation should be made faster.
In the circuit of FIG. 2, if the negative voltage is continuously supplied, and, thus, if the Vbb voltage comes down to a certain level, then a back bias voltage detecting signal is emitted by a back bias voltage detecting section (VLD section), so that the voltage generator enable signal should not be supplied, thereby maintaining the voltage at a constant level.
U.S. Pat. Nos. 4,794,278, 4,964,082 and 4,985,869 disclose other back bias voltage generators. In these conventional techniques, however, if the chip is put in a standby state, most of the transistors are turned off, but equalizers and pre-charge transistors operate, with the result that the amount of the leakage current is relatively small. In this state, the Vbb generator with a small driving capability is operated, thereby reducing the power consumption. If the chip becomes active, or if the Vbb voltage level does not reach a certain level (-3Vth), the Vbb generator which has a large driving capacity is operated, thereby preventing the Vbb voltage from rising due to the increase in the leakage current during activation of a large number of transistors.
In this conventional voltage generator, the oscillation period is fixed, and, therefore, it cannot respond accurately to the leakage current which is generated from the plurality of the transistors in which the operating conditions are changed between active and standby positions. Therefore, the oscillation period has to be determined by calculating the average value of the leakage current, and the peak current for driving the charge pumping capacitor may be increased, with the result that voltage variation may occur, thereby degrading the reliability of the semiconductor device.
In controlling the operation of the conventional back bias generator, the turning-on/off is controlled at a proper time under control of the timing control circuit. Thus, there are provided a plurality of oscillators which have different frequency ranges and which operate in accordance with the operating state of the circuits. The plurality of the oscillators are controlled so as to obtain suitable oscillating frequencies, and negative voltages thereby are obtained. Therefore, a plurality of oscillators and control circuits are required, and, therefore, the constitution of the circuit becomes complicated. Further, the voltage generator cannot be controlled in a linear manner, and, therefore, it becomes difficult to precisely control the Vbb voltage.